Messages in this thread | | | Date | Wed, 26 Jun 2019 09:33:18 -0700 (PDT) | Subject | Re: [PATCH net-next 01/10] net: stmmac: dwxgmac: Enable EDMA by default | From | David Miller <> |
| |
From: Jose Abreu <Jose.Abreu@synopsys.com> Date: Wed, 26 Jun 2019 15:47:35 +0200
> @@ -122,6 +122,8 @@ static void dwxgmac2_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi) > } > > writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE); > + writel(GENMASK(29, 0), ioaddr + XGMAC_TX_EDMA_CTRL); > + writel(GENMASK(29, 0), ioaddr + XGMAC_RX_EDMA_CTRL); > }
This mask is magic and there is no indication what the bits mean and in particular what it means to set bits 0 -- 29
You have to document what these bits mean and thus what these register writes actually do.
| |