Messages in this thread | | | Subject | Re: Allwinner SID THS calibration data cell representation? | From | Philipp Rossak <> | Date | Mon, 25 Feb 2019 21:37:55 +0100 |
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On 19.02.19 08:54, Chen-Yu Tsai wrote: > Sorry for resurrecting an old discussion, but since someone posted patches > for H5 and H6, I thought we should resolve this. I'm working on patches to > fix / replace the big-endian issue. > > On Thu, Sep 6, 2018 at 7:51 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: >> >> On Thu, Sep 06, 2018 at 01:47:47PM +0200, Philipp Rossak wrote: >>> On 04.09.2018 18:46, Emmanuel Vadot wrote: >>>>> + /* Data cells */ >>>>> + thermal_calibration: calib@234 { >>>>> + reg = <0x234 0x8>; >>>>> + }; >>>> You are declaring 8 bytes of calibration data but to my knowledge it's >>>> only 2 bytes per sensor, so 2 bytes for H3. >>>> Am I missing something ? >>>> >>>> Thanks, >>> >>> Emmanuel you are right, it is 2 bytes per Sensor and should be 2 bytes for >>> H3, but the thermal calibration data field is on all chips 64 bit wide - so >>> 8 bytes. So I'm reading here the complete calibration data field. >> >> Having one cell per channel would make more sense I guess. > > Would it? The 2 32-bit words directly map onto the registers 0x74 / 0x78 in > the THS. As far as the SID is concerned, their is just one consumer for this > data, the thermal sensor. How the thermal sensor uses that data is really not > its concern. And the thermal sensor is really just copying the data from the > e-fuses into its registers. Nothing more.
Using 2 32-bit words for the THS would be also ok (from my perspective). > > Furthermore, with the register access interface, the e-fuses are read/write > 32 bits at a time. Seems to me it would make more sense to enforce a 32-bit > word size, so cells should be multiples of 32 bits. > For THS I'm ok with that.
> Regards > ChenYu > Regards, Philipp
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