Messages in this thread | | | Subject | Re: [PATCH V3 1/2] dt-bindings/irq: add binding for NXP INTMUX interrupt multiplexer | From | Lokesh Vutla <> | Date | Fri, 20 Dec 2019 17:10:26 +0530 |
| |
On 20/12/19 1:07 PM, Joakim Zhang wrote: > This patch adds the DT bindings for the NXP INTMUX interrupt multiplexer > for i.MX8 family SoCs. > > Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> > --- > .../interrupt-controller/fsl,intmux.txt | 36 +++++++++++++++++++ > 1 file changed, 36 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt > new file mode 100644 > index 000000000000..3ebe9cac5f20 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.txt > @@ -0,0 +1,36 @@ > +Freescale INTMUX interrupt multiplexer > + > +Required properties: > + > +- compatible: Should be: > + - "fsl,imx-intmux" > +- reg: Physical base address and size of registers. > +- interrupts: Should contain the parent interrupt lines (up to 8) used to > + multiplex the input interrupts. > +- clocks: Should contain one clock for entry in clock-names. > +- clock-names: > + - "ipg": main logic clock > +- interrupt-controller: Identifies the node as an interrupt controller. > +- #interrupt-cells: Specifies the number of cells needed to encode an > + interrupt source. The value must be 2. > + - the 1st cell: hardware interrupt number> + - the 2nd cell: channel index, value must smaller than channels used
As per the xlate function, 1st cell is channel index and 2nd cell is hw interrupt number no?
Thanks and regards, Lokesh
> + > +Optional properties: > + > +- fsl,intmux_chans: The number of channels used for interrupt source. The > + Maximum value is 8. If this property is not set in DT then driver uses > + 1 channel by default. > + > +Example: > + > + intmux@37400000 { > + compatible = "fsl,imx-intmux"; > + reg = <0x37400000 0x1000>; > + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX8QM_CM40_IPG_CLK>; > + clock-names = "ipg"; > + interrupt-controller; > + #interrupt-cells = <1>; > + }; > + >
| |