Messages in this thread | ![/](/images/icornerl.gif) | | Subject | Re: [PATCH v3 11/11] arm64: dts: qcom: sc7180: Add pdc interrupt controller | From | Rajendra Nayak <> | Date | Mon, 4 Nov 2019 11:33:13 +0530 |
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On 10/26/2019 1:17 AM, Matthias Kaehlcke wrote: > Hi Rajendra/Maulik, > > On Wed, Oct 23, 2019 at 02:32:19PM +0530, Rajendra Nayak wrote: >> From: Maulik Shah <mkshah@codeaurora.org> >> >> Add pdc interrupt controller for sc7180 >> >> Signed-off-by: Maulik Shah <mkshah@codeaurora.org> >> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> >> --- >> v3: >> Used the qcom,sdm845-pdc compatible for pdc node >> >> arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++++++ >> 1 file changed, 10 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi >> index f2981ada578f..07ea393c2b5f 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi >> @@ -184,6 +184,16 @@ >> #power-domain-cells = <1>; >> }; >> >> + pdc: interrupt-controller@b220000 { > > Aren't the nodes supposed to be ordered by address as for SDM845? > If so this node should be added after 'qupv3_id_1: geniqup@ac0000', > not before.
yes, indeed. my sorting seems to have gone wrong. Will fix and repost. thanks
>
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