Messages in this thread Patch in this message | | | From | Jan Beulich <> | Subject | [PATCH] x86/stackframe/32: repair 32-bit Xen PV | Date | Mon, 7 Oct 2019 12:41:41 +0200 |
| |
Once again RPL checks have been introduced which don't account for a 32-bit kernel living in ring 1 when running in a PV Xen domain. The case in FIXUP_FRAME has been preventing boot; adjust BUG_IF_WRONG_CR3 as well just in case.
Fixes: 3c88c692c287 ("x86/stackframe/32: Provide consistent pt_regs") Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/arch/x86/entry/entry_32.S +++ b/arch/x86/entry/entry_32.S @@ -48,6 +48,17 @@ #include "calling.h" +#ifndef CONFIG_XEN_PV +# define USER_SEGMENT_RPL_MASK SEGMENT_RPL_MASK +#else +/* + * When running paravirtualized on Xen the kernel runs in ring 1, and hence + * simple mask based tests (i.e. ones not comparing against USER_RPL) have to + * ignore bit 0. See also the C-level get_kernel_rpl(). + */ +# define USER_SEGMENT_RPL_MASK (SEGMENT_RPL_MASK & ~1) +#endif + .section .entry.text, "ax" /* @@ -172,7 +183,7 @@ ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI .if \no_user_check == 0 /* coming from usermode? */ - testl $SEGMENT_RPL_MASK, PT_CS(%esp) + testl $USER_SEGMENT_RPL_MASK, PT_CS(%esp) jz .Lend_\@ .endif /* On user-cr3? */ @@ -217,7 +228,7 @@ testl $X86_EFLAGS_VM, 4*4(%esp) jnz .Lfrom_usermode_no_fixup_\@ #endif - testl $SEGMENT_RPL_MASK, 3*4(%esp) + testl $USER_SEGMENT_RPL_MASK, 3*4(%esp) jnz .Lfrom_usermode_no_fixup_\@ orl $CS_FROM_KERNEL, 3*4(%esp)
| |