Messages in this thread | | | Date | Fri, 21 Sep 2018 10:56:36 +0300 | From | Mika Westerberg <> | Subject | Re: [PATCH] pinctrl: intel: Do pin translation in other GPIO operations as well |
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On Thu, Sep 20, 2018 at 08:26:25AM -0700, Linus Walleij wrote: > On Tue, Sep 18, 2018 at 8:36 AM Mika Westerberg > <mika.westerberg@linux.intel.com> wrote: > > > For some reason I thought GPIOLIB handles translation from GPIO ranges > > to pinctrl pins but it turns out not to be the case. This means that > > when GPIOs operations are performed for a pin controller having a custom > > GPIO base such as Cannon Lake and Ice Lake incorrect pin number gets > > used internally. > > > > Fix this in the same way we did for lock/unlock IRQ operations and > > translate the GPIO number to pin before using it. > > > > Fixes: a60eac3239f0 ("pinctrl: intel: Allow custom GPIO base for pad groups") > > Reported-by: Rajat Jain <rajatja@google.com> > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> > > I applied this for fixes. > > However when merging with devel I get some a merge conflict, > probably due to some cleanups from Andy. > > I tried to fix it up (just use your code) but please check the > result.
Looks good to me. Thanks!
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