Messages in this thread | | | From | Luca Ceresoli <> | Subject | [PATCH 0/1] Fix ADI axi-i2s + Xilinx AXI-DMA capture | Date | Fri, 24 Aug 2018 18:04:29 +0200 |
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Hi,
here is a fix for a nasty audio capture problem when the axi-i2s output stream is fed to a Xilinx AXI-DMA.
The commit is simple and hopefully well described, but I am not 100% sure the solution is the correct one. If it is not, I'll be glad to know which one is the best. It solved my problem anyway.
Luca
Luca Ceresoli (1): axi-i2s: set period size register
sound/soc/adi/axi-i2s.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-)
-- 2.17.1
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