lkml.org 
[lkml]   [2018]   [Jul]   [21]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH 1/1] x86/apic: Future-proof TSC_DEADLINE quirk for SKX
Date
From: Len Brown <len.brown@intel.com>

All SKX with stepping higher than 4 support the TSC_DEADLINE,
no matter the microcode version.

Fixes: 616dd5872e ("x86/apic: Update TSC_DEADLINE quirk with additional SKX stepping")

Signed-off-by: Len Brown <len.brown@intel.com>
---
Without this patch, upcoming SKX steppings will not be able to use
their TSC_DEADLINE timer.

arch/x86/kernel/apic/apic.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index b203af0855b5..5caf8890fbe4 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -573,6 +573,9 @@ static u32 skx_deadline_rev(void)
case 0x04: return 0x02000014;
}

+ if (boot_cpu_data.x86_stepping > 4)
+ return 0;
+
return ~0U;
}

--
2.18.0-rc0
\
 
 \ /
  Last update: 2018-07-21 23:20    [W:0.032 / U:0.244 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site