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SubjectRe: [RFC PATCH v2 12/27] x86/mm: Shadow stack page fault error checking
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On 07/10/2018 03:26 PM, Yu-cheng Yu wrote:
> +++ b/arch/x86/include/asm/traps.h
> @@ -157,6 +157,7 @@ enum {
> * bit 3 == 1: use of reserved bit detected
> * bit 4 == 1: fault was an instruction fetch
> * bit 5 == 1: protection keys block access
> + * bit 6 == 1: shadow stack access fault
> */

Could we document this bit better?

Is this a fault where the *processor* thought it should be a shadow
stack fault? Or is it also set on faults to valid shadow stack PTEs
that just happen to fault for other reasons, say protection keys?

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