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SubjectRe: [PATCH 2/7] ixgbe: eliminate duplicate barriers on weakly-ordered archs
On Tue, Mar 13, 2018 at 8:20 PM, Sinan Kaya <> wrote:
> Code includes wmb() followed by writel() in multiple places. writel()
> already has a barrier on some architectures like arm64.
> This ends up CPU observing two barriers back to back before executing the
> register write.
> Since code already has an explicit barrier call, changing writel() to
> writel_relaxed().
> Signed-off-by: Sinan Kaya <>

In this patch you missed the writel at the end of ixgbe_tx_map.

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