Messages in this thread | | | Date | Fri, 2 Feb 2018 12:51:00 -0500 | From | Konrad Rzeszutek Wilk <> | Subject | Re: [PATCH v6 3/5] KVM: VMX: Emulate MSR_IA32_ARCH_CAPABILITIES |
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On Thu, Feb 01, 2018 at 10:59:44PM +0100, KarimAllah Ahmed wrote: > Intel processors use MSR_IA32_ARCH_CAPABILITIES MSR to indicate RDCL_NO > (bit 0) and IBRS_ALL (bit 1). This is a read-only MSR. By default the > contents will come directly from the hardware, but user-space can still > override it. > > [dwmw2: The bit in kvm_cpuid_7_0_edx_x86_features can be unconditional] > > Cc: Asit Mallick <asit.k.mallick@intel.com> > Cc: Dave Hansen <dave.hansen@intel.com> > Cc: Arjan Van De Ven <arjan.van.de.ven@intel.com> > Cc: Tim Chen <tim.c.chen@linux.intel.com> > Cc: Linus Torvalds <torvalds@linux-foundation.org> > Cc: Andrea Arcangeli <aarcange@redhat.com> > Cc: Andi Kleen <ak@linux.intel.com> > Cc: Thomas Gleixner <tglx@linutronix.de> > Cc: Dan Williams <dan.j.williams@intel.com> > Cc: Jun Nakajima <jun.nakajima@intel.com> > Cc: Andy Lutomirski <luto@kernel.org> > Cc: Greg KH <gregkh@linuxfoundation.org> > Cc: Paolo Bonzini <pbonzini@redhat.com> > Cc: Ashok Raj <ashok.raj@intel.com> > Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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