Messages in this thread | | | From | Stefan Chulski <> | Subject | RE: [PATCH net] net: mvpp2: 10G modes aren't supported on all ports | Date | Tue, 11 Dec 2018 21:11:31 +0000 |
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> -----Original Message----- > From: netdev-owner@vger.kernel.org <netdev-owner@vger.kernel.org> > On Behalf Of Russell King - ARM Linux > Sent: Tuesday, December 11, 2018 6:37 PM > To: Antoine Tenart <antoine.tenart@bootlin.com> > Cc: davem@davemloft.net; netdev@vger.kernel.org; linux- > kernel@vger.kernel.org; thomas.petazzoni@bootlin.com; > maxime.chevallier@bootlin.com; gregory.clement@bootlin.com; > miquel.raynal@bootlin.com; Nadav Haklai <nadavh@marvell.com>; Stefan > Chulski <stefanc@marvell.com>; Yan Markman <ymarkman@marvell.com>; > mw@semihalf.com; Baruch Siach <baruch@tkos.co.il> > Subject: Re: [PATCH net] net: mvpp2: 10G modes aren't supported on all > ports > > On Tue, Dec 11, 2018 at 05:32:28PM +0100, Antoine Tenart wrote: > > The mvpp2_phylink_validate() function sets all modes that are > > supported by a given PPv2 port. A recent change made all ports to > > advertise they support 10G modes in certain cases. This is not true, > > as only the port #0 can do so. This patch fixes it. > > > > Fixes: 01b3fd5ac97c ("net: mvpp2: fix detection of 10G SFP modules") > > Cc: Baruch Siach <baruch@tkos.co.il> > > Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> > > --- > > drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 14 ++++++++------ > > 1 file changed, 8 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c > > b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c > > index 125ea99418df..88aa488054a8 100644 > > --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c > > +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c > > @@ -4405,12 +4405,14 @@ static void mvpp2_phylink_validate(struct > net_device *dev, > > case PHY_INTERFACE_MODE_10GKR: > > case PHY_INTERFACE_MODE_XAUI: > > Are these modes supported on anything except port 0? If not, you should be > rejecting these, rather than just treating them as RGMII.
In CP115(which has PPv2) PHY_INTERFACE_MODE_10GKR supported on ports 0 and 1 PHY_INTERFACE_MODE_XAUI/PHY_INTERFACE_MODE_RXAUI supported only on port 0.
Best Regards.
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