lkml.org 
[lkml]   [2018]   [Nov]   [2]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Subject[RFC 0/2] Add RISC-V cpu topology
Date
This patch series adds the cpu topology for RISC-V. It contains
both the DT binding and actual source code. It has been tested on
QEMU & Unleashed board.

The idea is based on cpu-map in ARM with changes related to how
we define SMT systems. The reason for adopting a similar approach
to ARM as I feel it provides a very clear way of defining the
topology compared to parsing cache nodes to figure out which cpus
share the same package or core. I am open to any other idea to
implement cpu-topology as well.

Atish Patra (2):
dt-bindings: topology: Add RISC-V cpu topology.
RISC-V: Introduce cpu topology.

.../devicetree/bindings/riscv/topology.txt | 154 ++++++++++++++++
arch/riscv/include/asm/topology.h | 28 +++
arch/riscv/kernel/Makefile | 1 +
arch/riscv/kernel/smpboot.c | 5 +-
arch/riscv/kernel/topology.c | 194 +++++++++++++++++++++
5 files changed, 381 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/riscv/topology.txt
create mode 100644 arch/riscv/include/asm/topology.h
create mode 100644 arch/riscv/kernel/topology.c

--
2.7.4

\
 
 \ /
  Last update: 2018-11-02 00:05    [W:0.135 / U:1.988 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site