Messages in this thread | ![/](/images/icornerl.gif) | | From | Yogesh Narayan Gaur <> | Subject | RE: [PATCH v5 3/9] spi: Add a driver for the Freescale/NXP QuadSPI controller | Date | Wed, 14 Nov 2018 10:43:00 +0000 |
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Hi Frieder,
[..] > > > > Ok, I will have a look at what could make the chip selection fail in > > case of AHB read. > > Could you try with this change applied: > > @@ -503,7 +503,7 @@ static void fsl_qspi_select_mem(struct fsl_qspi *q, struct > spi_device *spi) > map_addr = q->memmap_phy; > else > map_addr = q->memmap_phy + > - 2 * q->devtype_data->ahb_buf_size; > + q->devtype_data->ahb_buf_size; > > qspi_writel(q, map_addr, q->iobase + QUADSPI_SFA1AD + > (i * 4)); > } >
I have tried above change and also have done few more changes but still AHB read for CS1 is falling.
I guess we need to implement dynamic memory mapping [1] for AHB Read as was being done in previous driver implementation. Would try this and update you.
[1] https://patchwork.ozlabs.org/patch/503655/
-- Regards Yogesh Gaur [..]
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