Messages in this thread Patch in this message | | | From | Daniel Lezcano <> | Subject | [PATCH 13/13] clocksource/drivers/dw_apb: Add reset control | Date | Fri, 5 Oct 2018 16:35:42 +0200 |
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From: Dinh Nguyen <dinguyen@kernel.org>
Add code to retrieve the reset property from the dw-apb timers and if the property is available, the safe operation is to assert the timer into reset, and followed by a deassert of the timer reset (brings the timer out of reset).
This patch is needed for systems where the bootloader has left the timer not used in reset.
- Trivial conflict with commit a74bd1ad7a: "Convert to using %pOFn instead of device_node.name"
Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> --- drivers/clocksource/dw_apb_timer_of.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c index fabaa29..db410ac 100644 --- a/drivers/clocksource/dw_apb_timer_of.c +++ b/drivers/clocksource/dw_apb_timer_of.c @@ -22,6 +22,7 @@ #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/clk.h> +#include <linux/reset.h> #include <linux/sched_clock.h> static void __init timer_get_base_and_rate(struct device_node *np, @@ -29,6 +30,7 @@ static void __init timer_get_base_and_rate(struct device_node *np, { struct clk *timer_clk; struct clk *pclk; + struct reset_control *rstc; *base = of_iomap(np, 0); @@ -36,6 +38,16 @@ static void __init timer_get_base_and_rate(struct device_node *np, panic("Unable to map regs for %pOFn", np); /* + * Reset the timer if the reset control is available, wiping + * out the state the firmware may have left it + */ + rstc = of_reset_control_get(np, NULL); + if (!IS_ERR(rstc)) { + reset_control_assert(rstc); + reset_control_deassert(rstc); + } + + /* * Not all implementations use a periphal clock, so don't panic * if it's not present */ -- 2.7.4
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