Messages in this thread | | | From | Clément Péron <> | Date | Tue, 23 Oct 2018 16:44:32 +0200 | Subject | Re: [PATCH] ARM: debug: enable UART1 for socfpga Cyclone5 |
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HI Dinh,
On Tue, 23 Oct 2018 at 16:04, Dinh Nguyen <dinguyen@kernel.org> wrote: > > Hi Clément, > > On 10/09/2018 06:28 AM, Clément Péron wrote: > > Cyclone5 and Arria10 doesn't have the same memory map for UART1. > > > > Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cylone5. > > > > I'm not sure the need for this patch. Are there any cyclone5 based > boards that has UART1 as the debug uart? I see that all of them are > using UART0.
There is no upstream device with this UART used. But the board I have use it, and there is no limitation to not have it available upstream no ?
Thanks, Clement
> > Dinh >
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