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SubjectRe: [PATCH] ARM: debug: enable UART1 for socfpga Cyclone5
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Hi Clément,

On 10/09/2018 06:28 AM, Clément Péron wrote:
> Cyclone5 and Arria10 doesn't have the same memory map for UART1.
>
> Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cylone5.
>

I'm not sure the need for this patch. Are there any cyclone5 based
boards that has UART1 as the debug uart? I see that all of them are
using UART0.

Dinh

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