Messages in this thread | | | Subject | Re: [PATCH 5/5] x86/feature: Detect the x86 feature Indirect Branch Prediction Barrier | Date | Fri, 12 Jan 2018 15:36:17 +0000 | From | "Woodhouse, David" <> |
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On Fri, 2018-01-12 at 09:31 -0600, Tom Lendacky wrote: > > AMD will follow the specification that if cpuid ax=0x7, return rdx[26] > is set, it will indicate both MSR registers and features are supported. > > But AMD also has a separate bit for IBPB (X86_FEATURE_PRED_CMD) alone. > As all of the IBRS/IBPB stuff happens, that patch will follow.
Please let's roll it into the patch set. I don't want Intel posting deliberately AMD-ignoring patches. Sort it out, guys.[unhandled content-type:application/x-pkcs7-signature] | |