Messages in this thread | | | Subject | Re: [PATCH 5/5] x86/feature: Detect the x86 feature Indirect Branch Prediction Barrier | From | Tom Lendacky <> | Date | Fri, 12 Jan 2018 09:21:53 -0600 |
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On 1/12/2018 6:39 AM, Woodhouse, David wrote: > On Fri, 2018-01-12 at 13:32 +0100, Borislav Petkov wrote: >> On Thu, Jan 11, 2018 at 05:32:19PM -0800, Ashok Raj wrote: >>> cpuid ax=0x7, return rdx bit 26 to indicate presence of both >>> IA32_SPEC_CTRL(MSR 0x48) and IA32_PRED_CMD(MSR 0x49) >> >> So why do we need two X86_FEATURE flags then? > > AMD has only the latter and enumerates them differently.
Correct. Both 0x48 and 0x49 are tied to the same cpuid bit. AMD has a separate cpuid bit for 0x49 (IBPB) alone.
Thanks, Tom
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