Messages in this thread | | | From | Paul Burton <> | Subject | [PATCH 0/4] MIPS cache & highmem fixes | Date | Tue, 1 Mar 2016 02:37:55 +0000 |
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This series fixes up a few issues with our current cache maintenance code, some specific to highmem & some not. It fixes an issue with icache corruption seen on the pistachio SoC & Ci40, and icache corruption seen using highmem on MIPS Malta boards with a P5600 CPU.
Applies atop v4.5-rc6. It would be great to squeeze these in for v4.5, but I recognise it's quite late in the cycle & this brokenness has been around for a while so won't object to v4.6.
Thanks, Paul
Paul Burton (4): MIPS: Flush dcache for flush_kernel_dcache_page MIPS: Flush highmem pages in __flush_dcache_page MIPS: Handle highmem pages in __update_cache MIPS: Sync icache & dcache in set_pte_at
arch/mips/include/asm/cacheflush.h | 7 +------ arch/mips/include/asm/pgtable.h | 26 +++++++++++++++++++----- arch/mips/mm/cache.c | 41 +++++++++++++++++++------------------- 3 files changed, 43 insertions(+), 31 deletions(-)
-- 2.7.1
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