Messages in this thread Patch in this message | | | From | 平松雅巳 / HIRAMATU,MASAMI <> | Subject | RE: [PATCH V2 5/7] x86/insn: perf tools: Add new memory instructions | Date | Thu, 3 Sep 2015 16:11:15 +0000 |
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> From: Adrian Hunter [mailto:adrian.hunter@intel.com] sn: perf tools: Add new memory instructions > > Intel Architecture Instruction Set Extensions Programing > Reference (Oct 2014) describes 3 new memory instructions, > namely clflushopt, clwb and pcommit. Add them to the op > code map and the perf tools new instructions test. e.g. > > $ tools/perf/perf test "x86 ins" > 39: Test x86 instruction decoder - new instructions : Ok > > Or to see the details: > > $ tools/perf/perf test -v "x86 ins" >
OK, I've checked that on the reference.
Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Thanks!
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> > --- > arch/x86/lib/x86-opcode-map.txt | 4 +- > tools/perf/tests/insn-x86-dat-32.c | 22 +++++++++++ > tools/perf/tests/insn-x86-dat-64.c | 34 ++++++++++++++++ > tools/perf/tests/insn-x86-dat-src.c | 46 ++++++++++++++++++++++ > .../perf/util/intel-pt-decoder/x86-opcode-map.txt | 4 +- > 5 files changed, 106 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt > index 25dad388b371..f4f0451a301e 100644 > --- a/arch/x86/lib/x86-opcode-map.txt > +++ b/arch/x86/lib/x86-opcode-map.txt > @@ -943,8 +943,8 @@ GrpTable: Grp15 > 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) > 4: XSAVE > 5: XRSTOR | lfence (11B) > -6: XSAVEOPT | mfence (11B) > -7: clflush | sfence (11B) > +6: XSAVEOPT | clwb (66) | mfence (11B) > +7: clflush | clflushopt (66) | sfence (11B) | pcommit (66),(11B) > EndTable > > GrpTable: Grp16 > diff --git a/tools/perf/tests/insn-x86-dat-32.c b/tools/perf/tests/insn-x86-dat-32.c > index 83f5078e74e1..4b09b7e130a0 100644 > --- a/tools/perf/tests/insn-x86-dat-32.c > +++ b/tools/perf/tests/insn-x86-dat-32.c > @@ -616,3 +616,25 @@ > "0f 38 cd 84 08 78 56 34 12 \tsha256msg2 0x12345678(%eax,%ecx,1),%xmm0",}, > {{0x0f, 0x38, 0xcd, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > "0f 38 cd 84 c8 78 56 34 12 \tsha256msg2 0x12345678(%eax,%ecx,8),%xmm0",}, > +{{0x66, 0x0f, 0xae, 0x38, }, 4, 0, "", "", > +"66 0f ae 38 \tclflushopt (%eax)",}, > +{{0x66, 0x0f, 0xae, 0x3d, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", > +"66 0f ae 3d 78 56 34 12 \tclflushopt 0x12345678",}, > +{{0x66, 0x0f, 0xae, 0xbc, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"66 0f ae bc c8 78 56 34 12 \tclflushopt 0x12345678(%eax,%ecx,8)",}, > +{{0x0f, 0xae, 0x38, }, 3, 0, "", "", > +"0f ae 38 \tclflush (%eax)",}, > +{{0x0f, 0xae, 0xf8, }, 3, 0, "", "", > +"0f ae f8 \tsfence ",}, > +{{0x66, 0x0f, 0xae, 0x30, }, 4, 0, "", "", > +"66 0f ae 30 \tclwb (%eax)",}, > +{{0x66, 0x0f, 0xae, 0x35, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", > +"66 0f ae 35 78 56 34 12 \tclwb 0x12345678",}, > +{{0x66, 0x0f, 0xae, 0xb4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"66 0f ae b4 c8 78 56 34 12 \tclwb 0x12345678(%eax,%ecx,8)",}, > +{{0x0f, 0xae, 0x30, }, 3, 0, "", "", > +"0f ae 30 \txsaveopt (%eax)",}, > +{{0x0f, 0xae, 0xf0, }, 3, 0, "", "", > +"0f ae f0 \tmfence ",}, > +{{0x66, 0x0f, 0xae, 0xf8, }, 4, 0, "", "", > +"66 0f ae f8 \tpcommit ",}, > diff --git a/tools/perf/tests/insn-x86-dat-64.c b/tools/perf/tests/insn-x86-dat-64.c > index 13f008588590..5da235a4414f 100644 > --- a/tools/perf/tests/insn-x86-dat-64.c > +++ b/tools/perf/tests/insn-x86-dat-64.c > @@ -702,3 +702,37 @@ > "0f 38 cd 84 c8 78 56 34 12 \tsha256msg2 0x12345678(%rax,%rcx,8),%xmm0",}, > {{0x44, 0x0f, 0x38, 0xcd, 0xbc, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", > "44 0f 38 cd bc c8 78 56 34 12 \tsha256msg2 0x12345678(%rax,%rcx,8),%xmm15",}, > +{{0x66, 0x0f, 0xae, 0x38, }, 4, 0, "", "", > +"66 0f ae 38 \tclflushopt (%rax)",}, > +{{0x66, 0x41, 0x0f, 0xae, 0x38, }, 5, 0, "", "", > +"66 41 0f ae 38 \tclflushopt (%r8)",}, > +{{0x66, 0x0f, 0xae, 0x3c, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"66 0f ae 3c 25 78 56 34 12 \tclflushopt 0x12345678",}, > +{{0x66, 0x0f, 0xae, 0xbc, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"66 0f ae bc c8 78 56 34 12 \tclflushopt 0x12345678(%rax,%rcx,8)",}, > +{{0x66, 0x41, 0x0f, 0xae, 0xbc, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", > +"66 41 0f ae bc c8 78 56 34 12 \tclflushopt 0x12345678(%r8,%rcx,8)",}, > +{{0x0f, 0xae, 0x38, }, 3, 0, "", "", > +"0f ae 38 \tclflush (%rax)",}, > +{{0x41, 0x0f, 0xae, 0x38, }, 4, 0, "", "", > +"41 0f ae 38 \tclflush (%r8)",}, > +{{0x0f, 0xae, 0xf8, }, 3, 0, "", "", > +"0f ae f8 \tsfence ",}, > +{{0x66, 0x0f, 0xae, 0x30, }, 4, 0, "", "", > +"66 0f ae 30 \tclwb (%rax)",}, > +{{0x66, 0x41, 0x0f, 0xae, 0x30, }, 5, 0, "", "", > +"66 41 0f ae 30 \tclwb (%r8)",}, > +{{0x66, 0x0f, 0xae, 0x34, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"66 0f ae 34 25 78 56 34 12 \tclwb 0x12345678",}, > +{{0x66, 0x0f, 0xae, 0xb4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"66 0f ae b4 c8 78 56 34 12 \tclwb 0x12345678(%rax,%rcx,8)",}, > +{{0x66, 0x41, 0x0f, 0xae, 0xb4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", > +"66 41 0f ae b4 c8 78 56 34 12 \tclwb 0x12345678(%r8,%rcx,8)",}, > +{{0x0f, 0xae, 0x30, }, 3, 0, "", "", > +"0f ae 30 \txsaveopt (%rax)",}, > +{{0x41, 0x0f, 0xae, 0x30, }, 4, 0, "", "", > +"41 0f ae 30 \txsaveopt (%r8)",}, > +{{0x0f, 0xae, 0xf0, }, 3, 0, "", "", > +"0f ae f0 \tmfence ",}, > +{{0x66, 0x0f, 0xae, 0xf8, }, 4, 0, "", "", > +"66 0f ae f8 \tpcommit ",}, > diff --git a/tools/perf/tests/insn-x86-dat-src.c b/tools/perf/tests/insn-x86-dat-src.c > index 7d06c9b22070..482637f44245 100644 > --- a/tools/perf/tests/insn-x86-dat-src.c > +++ b/tools/perf/tests/insn-x86-dat-src.c > @@ -421,6 +421,30 @@ int main(void) > asm volatile("sha256msg2 0x12345678(%rax,%rcx,8), %xmm0"); > asm volatile("sha256msg2 0x12345678(%rax,%rcx,8), %xmm15"); > > + /* clflushopt m8 */ > + > + asm volatile("clflushopt (%rax)"); > + asm volatile("clflushopt (%r8)"); > + asm volatile("clflushopt (0x12345678)"); > + asm volatile("clflushopt 0x12345678(%rax,%rcx,8)"); > + asm volatile("clflushopt 0x12345678(%r8,%rcx,8)"); > + /* Also check instructions in the same group encoding as clflushopt */ > + asm volatile("clflush (%rax)"); > + asm volatile("clflush (%r8)"); > + asm volatile("sfence"); > + > + /* clwb m8 */ > + > + asm volatile("clwb (%rax)"); > + asm volatile("clwb (%r8)"); > + asm volatile("clwb (0x12345678)"); > + asm volatile("clwb 0x12345678(%rax,%rcx,8)"); > + asm volatile("clwb 0x12345678(%r8,%rcx,8)"); > + /* Also check instructions in the same group encoding as clwb */ > + asm volatile("xsaveopt (%rax)"); > + asm volatile("xsaveopt (%r8)"); > + asm volatile("mfence"); > + > #else /* #ifdef __x86_64__ */ > > /* bndmk m32, bnd */ > @@ -780,8 +804,30 @@ int main(void) > asm volatile("sha256msg2 0x12345678(%eax,%ecx,1), %xmm0"); > asm volatile("sha256msg2 0x12345678(%eax,%ecx,8), %xmm0"); > > + /* clflushopt m8 */ > + > + asm volatile("clflushopt (%eax)"); > + asm volatile("clflushopt (0x12345678)"); > + asm volatile("clflushopt 0x12345678(%eax,%ecx,8)"); > + /* Also check instructions in the same group encoding as clflushopt */ > + asm volatile("clflush (%eax)"); > + asm volatile("sfence"); > + > + /* clwb m8 */ > + > + asm volatile("clwb (%eax)"); > + asm volatile("clwb (0x12345678)"); > + asm volatile("clwb 0x12345678(%eax,%ecx,8)"); > + /* Also check instructions in the same group encoding as clwb */ > + asm volatile("xsaveopt (%eax)"); > + asm volatile("mfence"); > + > #endif /* #ifndef __x86_64__ */ > > + /* pcommit */ > + > + asm volatile("pcommit"); > + > /* Following line is a marker for the awk script - do not change */ > asm volatile("rdtsc"); /* Stop here */ > > diff --git a/tools/perf/util/intel-pt-decoder/x86-opcode-map.txt b/tools/perf/util/intel-pt-decoder/x86-opcode-map.txt > index 25dad388b371..f4f0451a301e 100644 > --- a/tools/perf/util/intel-pt-decoder/x86-opcode-map.txt > +++ b/tools/perf/util/intel-pt-decoder/x86-opcode-map.txt > @@ -943,8 +943,8 @@ GrpTable: Grp15 > 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) > 4: XSAVE > 5: XRSTOR | lfence (11B) > -6: XSAVEOPT | mfence (11B) > -7: clflush | sfence (11B) > +6: XSAVEOPT | clwb (66) | mfence (11B) > +7: clflush | clflushopt (66) | sfence (11B) | pcommit (66),(11B) > EndTable > > GrpTable: Grp16 > -- > 1.9.1
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