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Subject[PATCH 0/4] CM L2 prefetch support
Date

This series introduces support for enabling & disabling L2 cache
prefetch units found in systems with CM 2.5 & above (P5600 & I6400 in
terms of currently supported cores). They are enabled by default during
boot and entries are optionally added to DebugFS to enable or disable
prefetching.

Paul Burton (4):
MIPS: Introduce API for enabling & disabling L2 prefetch
MIPS: Enable L2 prefetching for CM >= 2.5
MIPS: Declare mips_debugfs_dir in a header
MIPS: Allow L2 prefetch to be configured via debugfs

arch/mips/Kconfig.debug | 10 +++++
arch/mips/include/asm/bcache.h | 27 ++++++++++++
arch/mips/include/asm/debug.h | 22 ++++++++++
arch/mips/include/asm/mips-cm.h | 17 ++++++++
arch/mips/kernel/mips-r2-to-r6-emul.c | 2 +-
arch/mips/kernel/segment.c | 2 +-
arch/mips/kernel/setup.c | 1 +
arch/mips/kernel/spinlock_test.c | 4 +-
arch/mips/kernel/unaligned.c | 2 +-
arch/mips/math-emu/me-debugfs.c | 2 +-
arch/mips/mm/Makefile | 1 +
arch/mips/mm/sc-debugfs.c | 81 +++++++++++++++++++++++++++++++++++
arch/mips/mm/sc-mips.c | 61 +++++++++++++++++++++++++-
13 files changed, 224 insertions(+), 8 deletions(-)
create mode 100644 arch/mips/include/asm/debug.h
create mode 100644 arch/mips/mm/sc-debugfs.c

--
2.5.3



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