Messages in this thread | | | From | Ashok Raj <> | Subject | [Patch V2 0/3] x86, mce: Local Machine Check Exception (LMCE) | Date | Tue, 2 Jun 2015 10:49:51 -0700 |
| |
Hi Boris
Thanks for the feedback on V1. Almost all of your recommendations are included in this update.
I haven't got a chance to test on qemu yet, but this patch fixes access to MSR per your recommandation, so should be fine. I'm in process of making similar changes to kvm/Qemu that i will send once I have learned to build test it :-).
Historically machine checks on Intel X86 processors have been broadcast to all logical processors in the system. Upcoming CPUs will support an opt-in mechanism to request some machine checks delivered to a single logical processor experiencing the fault.
For more details see Vol3, Chapter 15, Machine Check Architecture.
Modified to incorporate feedback from Boris on V1 patches.
Ashok Raj (3): x86, mce: Add LMCE definitions. x86, mce: Add infrastructure required to support LMCE x86, mce: Handling LMCE events
Documentation/x86/x86_64/boot-options.txt | 3 ++ arch/x86/include/asm/mce.h | 10 ++++++ arch/x86/include/uapi/asm/msr-index.h | 2 ++ arch/x86/kernel/cpu/mcheck/mce.c | 35 ++++++++++++++---- arch/x86/kernel/cpu/mcheck/mce_intel.c | 60 +++++++++++++++++++++++++++++++ 5 files changed, 104 insertions(+), 6 deletions(-)
-- 1.9.1
| |