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SubjectRe: [PATCH 1/1] x86 TSC: set X86_FEATURE_TSC_RELIABLE, per CPUID
From
On Mon, Jun 1, 2015 at 2:40 PM, Andy Lutomirski <luto@kernel.org> wrote:
> On 05/30/2015 10:44 PM, Len Brown wrote:
>>
>> From: Len Brown <len.brown@intel.com>
>>
>> Speed cpu_up() by believing CPUID's "invariant TSC" flag,
>> and skipping the TSC warp test on single socket systems.
>
>
> I'm typing this email on a "Intel(R) Core(TM) i7-3930K CPU @ 3.20GHz" with a
> "X79A-GD65 (8D) (MS-7760)" motherboard. (DO NOT BUY THAT MOTHERBOARD!)
>
> The brilliant stock firmware breaks TSC sync on bootup. Even with the
> updated firmware I'm using, it's broken on resume from S3.

So the stock firmware broke the TSC on boot _and_ S3.
The updated firmware does not break the TSC on boot, but still breaks it on S3?

For this board, please send the output from
$ dmesg | grep -i tsc

I would think we could detect this issue much faster than requesting
the full 2ms test.

> If you want to make this depend on X86_FEATURE_TSC_ADJUST and confirm that
> all cores have the same IA32_TSC_ADJUST value, then maybe that would be
> okay.

That suggestion sounds reasonable.

BTW, it also begs the question if Linux could actually *repair* the BIOS damage?

thanks,
Len Brown, Intel Open Source Technology Center


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