Messages in this thread | | | Date | Mon, 4 May 2015 20:46:43 +0200 | From | Borislav Petkov <> | Subject | Re: [PATCH 2/4] x86/mce/amd: Introduce deferred error interrupt handler |
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On Mon, May 04, 2015 at 12:08:16PM -0500, Aravind Gopalakrishnan wrote: > Not sure if lvt_off_valid() can be reused for deferred error interrupt > setup. It expects some some of info to be in struct threshold_block > which is fine for threshold errors and the shifts for offset are > different too.
I meant that thresholding and IBS is being taken care of by that function.
> For deferred errors, the workaround is a little different as it > applies to only the given family/model right now. If the workaround > needs to be applied for future processors, we can extend the family > check for those right?
Or, you can do the check for all families as we're behind a CPUID bit anyway. This is why CPUID bits are a good thing :-)
> If we setup 'm.addr' in amd_threshold_interrupt() and > amd_deferred_error_interrupt() properly, then amd_decode_mce() would > actually have some value in m->addr to report. > > I didn't mean to say HW doesn't provide us the information in the addr > and/or the misc registers.
So you can use mce_read_aux(), yeah, you can move it to mce-internal.h
> The addr, misc registers are still valid for threshold, deferred errors. > (Of course, misc is valid only if m->status & MCI_STATUS_MISCV) > > My point was, in __log_error(), we can read relevant status and addr MSRs to > be passed to mce_log() as those are the only pieces of information we use in > the decoding chain; and discard the m.misc assignment we do for threshold > errors.
But MCx_MISC is important for thresholding errors, it carries the ErrCnt and stuff.
So you can pass a parameter to __log_error(..., threshold=true, misc) and do
if (threshold) m.misc = misc;
Right?
-- Regards/Gruss, Boris.
ECO tip #101: Trim your mails when you reply. --
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