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Subject[PATCH v4 15/20] clk: tegra: pll: Add dyn_ramp callback
Date
From: Bill Huang <bilhuang@nvidia.com>

Add a callback to the pll_params for custom dynamic ramping
functions which can be specified per PLL.

Signed-off-by: Bill Huang <bilhuang@nvidia.com>
---
drivers/clk/tegra/clk.h | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index fb4caa510583..74cf6242a57a 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -160,6 +160,8 @@ struct div_nmp {

#define MAX_PLL_MISC_REG_COUNT 6

+struct tegra_clk_pll;
+
/**
* struct clk_pll_params - PLL parameters
*
@@ -250,6 +252,8 @@ struct tegra_clk_pll_params {
unsigned long rate, unsigned long parent_rate);
unsigned long (*adjust_vco)(struct tegra_clk_pll_params *pll_params,
unsigned long parent_rate);
+ int (*dyn_ramp)(struct tegra_clk_pll *pll,
+ struct tegra_clk_pll_freq_table *cfg);
};

#define TEGRA_PLL_USE_LOCK BIT(0)
--
1.7.9.5


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