Messages in this thread Patch in this message | | | From | Antoine Tenart <> | Subject | [PATCH v2] ARM: berlin: add SPI nodes for BG2Q | Date | Wed, 27 May 2015 09:59:33 +0200 |
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The BG2Q SoC has two SPI controllers. Add the corresponding nodes.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> ---
Changes since v1: - reworked the pinmux - removed useless interrupt-parent properties - typo
arch/arm/boot/dts/berlin2q.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 187d056f7ad2..9f42ebfa50f2 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -286,6 +286,19 @@ status = "disabled"; }; + spi0: spi@1c00 { + compatible = "snps,dw-apb-ssi"; + reg = <0x1c00 0x100>; + interrupts = <7>; + clocks = <&chip_clk CLKID_CFG>; + pinctrl-0 = <&spi1_pmux>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <4>; + status = "disabled"; + }; + timer0: timer@2c00 { compatible = "snps,dw-apb-timer"; reg = <0x2c00 0x14>; @@ -383,6 +396,11 @@ groups = "G7"; function = "twsi1"; }; + + spi1_pmux: spi1-pmux { + groups = "G8"; + function = "spi1"; + }; }; chip_rst: reset { @@ -473,6 +491,19 @@ }; }; + spi1: spi@6000 { + compatible = "snps,dw-apb-ssi"; + reg = <0x6000 0x100>; + interrupts = <5>; + clocks = <&refclk>; + pinctrl-0 = <&spi2_pmux>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <4>; + status = "disabled"; + }; + i2c2: i2c@7000 { compatible = "snps,designware-i2c"; #address-cells = <1>; @@ -564,6 +595,11 @@ groups = "GSM14"; function = "twsi3"; }; + + spi2_pmux: spi2-pmux { + groups = "GSM3"; + function = "spi2"; + }; }; }; -- 2.4.1
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