Messages in this thread Patch in this message | | | Date | Fri, 15 May 2015 10:05:44 +0200 | From | Willy Tarreau <> | Subject | [ 14/48] serial: samsung: wait for transfer completion before clock disable |
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2.6.32-longterm review patch. If anyone has any objections, please let me know.
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From: Robert Baldyga <r.baldyga@samsung.com>
This patch adds waiting until transmit buffer and shifter will be empty before clock disabling.
Without this fix it's possible to have clock disabled while data was not transmited yet, which causes unproper state of TX line and problems in following data transfers.
Cc: stable@vger.kernel.org Signed-off-by: Robert Baldyga <r.baldyga@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> (cherry picked from commit 1ff383a4c3eda8893ec61b02831826e1b1f46b41) Signed-off-by: Willy Tarreau <w@1wt.eu> --- drivers/serial/samsung.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c index 1523e8d..05801c0 100644 --- a/drivers/serial/samsung.c +++ b/drivers/serial/samsung.c @@ -443,11 +443,15 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level, unsigned int old) { struct s3c24xx_uart_port *ourport = to_ourport(port); + int timeout = 10000; ourport->pm_level = level; switch (level) { case 3: + while (--timeout && !s3c24xx_serial_txempty_nofifo(port)) + udelay(100); + if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL) clk_disable(ourport->baudclk); -- 1.7.12.2.21.g234cd45.dirty
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