Messages in this thread | | | Date | Tue, 27 Oct 2015 19:40:20 +0100 | From | Peter Zijlstra <> | Subject | Re: Q: schedule() and implied barriers on arm64 |
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On Tue, Oct 27, 2015 at 04:19:48PM +0000, Will Deacon wrote: > ... and the 'normal' code will have a control hazard somewhere, followed > by the implicit ISB in exception return, so there's a barrier of sorts > there too.
Which exception return?
> The problem is that people say "full barrier" without defining what it > really means, and we end up going round the houses on things like > transitivity (which ctrl + isb doesn't always give you).
I pretty much meant smp_mb() here :-)
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