Messages in this thread | | | Date | Mon, 22 Dec 2014 21:15:42 +0100 | From | Borislav Petkov <> | Subject | Re: [PATCH 0/3] Fix MCE handling for AMD multi-node processors |
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On Mon, Dec 22, 2014 at 02:10:09PM -0600, Aravind Gopalakrishnan wrote: > When a MCE happens that is to be logged onto bank 4 of AMD multi-node > processors, they are reported only to corresponding node base core of > the cpu on which the error occurred. > > Refer D18F3x44[NbMcaToMstCpuEn] on BKDGs of Fam10h and later for
Let me try to understand this correctly:
Does that mean that we could fix this by simply doing:
D18F3x44[NbMcaToMstCpuEn]=0b
on each NB?
-- Regards/Gruss, Boris.
Sent from a fat crate under my desk. Formatting is fine. --
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