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SubjectRe: [PATCH v4 1/7] x86, mm, pat: Set WT to PA7 slot of PAT MSR
On Mon, 27 Oct 2014, Toshi Kani wrote:
> + } else {
> + /*
> + * PAT full support. WT is set to slot 7, which minimizes
> + * the risk of using the PAT bit as slot 3 is UC and is
> + * currently unused. Slot 4 should remain as reserved.

This comment makes no sense. What minimizes which risk and what has
this to do with slot 3 and slot 4?

> + *
> + * PTE encoding used in Linux:
> + * PAT
> + * |PCD
> + * ||PWT PAT
> + * ||| slot
> + * 000 0 WB : _PAGE_CACHE_MODE_WB
> + * 001 1 WC : _PAGE_CACHE_MODE_WC
> + * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS
> + * 011 3 UC : _PAGE_CACHE_MODE_UC
> + * 100 4 <reserved>
> + * 101 5 <reserved>
> + * 110 6 <reserved>

Well, they are still mapped to WB/WC/UC_MINUS ....

> + * 111 7 WT : _PAGE_CACHE_MODE_WT
> + */
> + pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |
> + PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, WT);
> + }

Thanks,

tglx


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