lkml.org 
[lkml]   [2014]   [Nov]   [13]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH 1/2] clk: rockchip: add clock ID for usbphy480m_src
Date
There are 3 different parent clock from different usbphy,
all of them are fixed 480MHz, it is not able to auto select
by clock core to the 2nd and the 3rd parent.
For different use case for different board, we may need to
select different usbphy clock out as parent manually.

Add the clock ID for it so that we can use in dts.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

include/dt-bindings/clock/rk3288-cru.h | 1 +
1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index 100a08c..3dcc906 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -71,6 +71,7 @@
#define SCLK_HDMI_CEC 110
#define SCLK_HEVC_CABAC 111
#define SCLK_HEVC_CORE 112
+#define SCLK_USBPHY480M_SRC 113

#define DCLK_VOP0 190
#define DCLK_VOP1 191
--
1.9.1


\
 
 \ /
  Last update: 2014-11-13 09:01    [W:0.065 / U:3.844 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site