Messages in this thread Patch in this message | | | Date | Fri, 24 Jan 2014 16:40:02 +0100 | From | Peter Zijlstra <> | Subject | tools/perf: Fix AAAAARGH64 memory barriers |
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Someone got the load and store barriers mixed up for AAAAARGH64. Turn them the right side up.
Fixes: a94d342b9cb0 ("tools/perf: Add required memory barriers") Reported-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Peter Zijlstra <peterz@infradead.org> --- tools/perf/perf.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/perf/perf.h b/tools/perf/perf.h index 3c2f213e979d..dd4c0d32fbae 100644 --- a/tools/perf/perf.h +++ b/tools/perf/perf.h @@ -100,8 +100,8 @@ #ifdef __aarch64__ #define mb() asm volatile("dmb ish" ::: "memory") -#define wmb() asm volatile("dmb ishld" ::: "memory") -#define rmb() asm volatile("dmb ishst" ::: "memory") +#define wmb() asm volatile("dmb ishst" ::: "memory") +#define rmb() asm volatile("dmb ishld" ::: "memory") #define cpu_relax() asm volatile("yield" ::: "memory") #endif
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