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SubjectRe: [PATCH] regulator: ti-abb: Add support for interleaved LDO registers
On 01/17/2014 10:08 AM, Mark Brown wrote:
> On Thu, Jan 16, 2014 at 01:32:30PM -0600, Nishanth Menon wrote:
>> Certain platforms such as DRA7 have quirky memory maps such as:
>> PRM_ABBLDO_DSPEVE_CTRL 0x4ae07e20
>> PRM_ABBLDO_IVA_CTRL 0x4ae07e24
>> other-registers
>> PRM_ABBLDO_DSPEVE_SETUP 0x4ae07e30
>> PRM_ABBLDO_IVA_SETUP 0x4ae07e34
>>
>> These need the address allocation to be either shared OR unique
>> allocation per register instance.
>
> Is there a system controller involved here by any chance?
>
Nope. ABB LDO module is a standalone instance whose register set
happens to be part of a memory range, as I recently got to know, is a
favorite for our hardware designers to put "misc" modules at SoC
integration time - Sigh! I guess I have made more than enough stink
about this internally already :(.

--
Regards,
Nishanth Menon


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