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SubjectRe: [PATCH] regulator: ti-abb: Add support for interleaved LDO registers
On Tue, Jan 21, 2014 at 02:06:25PM -0600, Nishanth Menon wrote:

> Without this change, on DRA7 I get:
> [ 0.579500] abb_mpu: 1060 <--> 1210 mV
> [ 0.580321] abb_ivahd: 1055 <--> 1250 mV
> [ 0.580583] ti_abb 4ae07e20.regulator-abb-dspeve: can't request
> region for resource [mem 0x4ae07e20-0x4ae07e2f]
> [ 0.580610] ti_abb: probe of 4ae07e20.regulator-abb-dspeve failed
> with error -16
> [ 0.581216] abb_gpu: 1090 <--> 1280 mV

OK, that's not to do with nocache, that's to do with duplicate
request_mem_region() calls. Of course the trick here is that if the
other thing that requests the memory region doesn't do it then we have a

I really can't help thinking that a system controller node as the parent
is going to make things happier for devices that share this register
bank. I guess it might be possible to also do it with single register
memory regions but I'd not be surprised if that wasn't possible and it
doesn't seem as idiomatic.
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