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Subject[PATCHv3 0/9] ARM: sunxi: Introduce Allwinner A20 support
Hi everyone,

This patchset brings in support for the Allwinner A20 SoC.

This SoC is pretty much the heir of the Allwinner A10. They both have a lot of
IP in common, the A20 is pin-compatible with the A10, the only major difference
being that the A20 has 2 Cortex-A7 instead of the single Cortex-A8 found in the

Just like the A31, the SMP support isn't there yet, nor do we have clock
support or any storage device.

We also have the same SMP bit issue that makes Linux run without the caches
enabled for the time being when CONFIG_SMP isn't set.

This serie comes on top of the serie "ARM: sunxi: Add support for the Allwinner
A31 SoC" I sent previously.


Changes from v2:
- Fix the SoC base address in the DT
- Fixed a typo in the olinuxino's LED label

Changes from v1:
- Removed the patch that wrapped the compatibles in the clock driver

Maxime Ripard (9):
ARM: sunxi: Introduce Allwinner A20 support
ARM: sun7i: Add Allwinner A20 DTSI
ARM: sun7i: Add Olimex A20-Olinuxino-Micro support
pinctrl: sunxi: Add Allwinner A20 pins set
pinctrl: sunxi: Fix inconsistent indentation
ARM: sun7i: Add the PIO controller node to the DTSI
ARM: sun7i: DT: Add UART muxing options to the DTSI
ARM: sun7i: a20-olinuxino: Enable UARTs muxing
ARM: sun7i: a20-olinuxino: Enable the user LED

arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 61 ++
arch/arm/boot/dts/sun7i-a20.dtsi | 205 +++++
arch/arm/mach-sunxi/sunxi.c | 1 +
drivers/pinctrl/pinctrl-sunxi-pins.h | 1028 ++++++++++++++++++++++-
drivers/pinctrl/pinctrl-sunxi.c | 1 +
6 files changed, 1293 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
create mode 100644 arch/arm/boot/dts/sun7i-a20.dtsi


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