lkml.org 
[lkml]   [2013]   [Aug]   [12]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 1/9] PCI: mvebu: move clock enable before register access
    Date
    The clock passed to PCI controller found on MVEBU SoCs may come from a
    clock gate. This requires the clock to be enabled before any registers
    are accessed. Therefore, move the clock enable before register iomap to
    ensure it is enabled.

    Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
    ---
    Cc: Russell King <linux@arm.linux.org.uk>
    Cc: Jason Cooper <jason@lakedaemon.net>
    Cc: Andrew Lunn <andrew@lunn.ch>
    Cc: Bjorn Helgaas <bhelgaas@google.com>
    Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
    Cc: linux-kernel@vger.kernel.org
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-pci@vger.kernel.org
    ---
    drivers/pci/host/pci-mvebu.c | 23 ++++++++++-------------
    1 file changed, 10 insertions(+), 13 deletions(-)

    diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
    index 6aa0daf..d5fe674 100644
    --- a/drivers/pci/host/pci-mvebu.c
    +++ b/drivers/pci/host/pci-mvebu.c
    @@ -897,6 +897,16 @@ static int __init mvebu_pcie_probe(struct platform_device *pdev)
    continue;
    }

    + port->clk = of_clk_get_by_name(child, NULL);
    + if (IS_ERR(port->clk)) {
    + dev_err(&pdev->dev, "PCIe%d.%d: cannot get clock\n",
    + port->port, port->lane);
    + iounmap(port->base);
    + port->haslink = 0;
    + continue;
    + }
    + clk_prepare_enable(port->clk);
    +
    port->base = mvebu_pcie_map_registers(pdev, child, port);
    if (!port->base) {
    dev_err(&pdev->dev, "PCIe%d.%d: cannot map registers\n",
    @@ -916,22 +926,9 @@ static int __init mvebu_pcie_probe(struct platform_device *pdev)
    port->port, port->lane);
    }

    - port->clk = of_clk_get_by_name(child, NULL);
    - if (IS_ERR(port->clk)) {
    - dev_err(&pdev->dev, "PCIe%d.%d: cannot get clock\n",
    - port->port, port->lane);
    - iounmap(port->base);
    - port->haslink = 0;
    - continue;
    - }
    -
    port->dn = child;
    -
    - clk_prepare_enable(port->clk);
    spin_lock_init(&port->conf_lock);
    -
    mvebu_sw_pci_bridge_init(port);
    -
    i++;
    }

    --
    1.7.10.4


    \
     
     \ /
      Last update: 2013-08-12 21:21    [W:10.808 / U:0.392 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site