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SubjectRe: [PATCH 3/5] devicetree: create a separate binding description for sata_highbank
On 07/26/2013 10:11 AM, Mark Langsdorf wrote:
> The Calxeda sata_highbank driver has been adding its descriptions to the
> ahci driver. Separate them properly.
>
> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>

Acked-by: Rob Herring <rob.herring@calxeda.com>

Rob

> ---
> .../devicetree/bindings/ata/ahci-platform.txt | 14 ++--------
> .../devicetree/bindings/ata/sata_highbank.txt | 32 ++++++++++++++++++++++
> 2 files changed, 34 insertions(+), 12 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/ata/sata_highbank.txt
>
> diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
> index 3ec0c5c..14d7b22 100644
> --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
> +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
> @@ -4,27 +4,17 @@ SATA nodes are defined to describe on-chip Serial ATA controllers.
> Each SATA controller should have its own node.
>
> Required properties:
> -- compatible : compatible list, contains "calxeda,hb-ahci" or "snps,spear-ahci"
> +- compatible : compatible list, contains "snps,spear-ahci"
> - interrupts : <interrupt mapping for SATA IRQ>
> - reg : <registers mapping>
>
> Optional properties:
> -- calxeda,port-phys: phandle-combophy and lane assignment, which maps each
> - SATA port to a combophy and a lane within that
> - combophy
> -- calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
> - which indicates that the driver supports SGPIO
> - indicator lights using the indicated GPIOs
> -- calxeda,led-order : a u32 array that map port numbers to offsets within the
> - SGPIO bitstream.
> - dma-coherent : Present if dma operations are coherent
>
> Example:
> sata@ffe08000 {
> - compatible = "calxeda,hb-ahci";
> + compatible = "snps,spear-ahci";
> reg = <0xffe08000 0x1000>;
> interrupts = <115>;
> - calxeda,port-phys = <&combophy5 0 &combophy0 0 &combophy0 1
> - &combophy0 2 &combophy0 3>;
>
> };
> diff --git a/Documentation/devicetree/bindings/ata/sata_highbank.txt b/Documentation/devicetree/bindings/ata/sata_highbank.txt
> new file mode 100644
> index 0000000..aa1b798
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/sata_highbank.txt
> @@ -0,0 +1,32 @@
> +* Calxeda AHCI SATA Controller
> +
> +SATA nodes are defined to describe on-chip Serial ATA controllers.
> +The Calxeda SATA controller mostly conforms to the AHCI interface
> +with some special extensions to add functionality.
> +Each SATA controller should have its own node.
> +
> +Required properties:
> +- compatible : compatible list, contains "calxeda,hb-ahci"
> +- interrupts : <interrupt mapping for SATA IRQ>
> +- reg : <registers mapping>
> +
> +Optional properties:
> +- dma-coherent : Present if dma operations are coherent
> +- calxeda,port-phys: phandle-combophy and lane assignment, which maps each
> + SATA port to a combophy and a lane within that
> + combophy
> +- calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
> + which indicates that the driver supports SGPIO
> + indicator lights using the indicated GPIOs
> +- calxeda,led-order : a u32 array that map port numbers to offsets within the
> + SGPIO bitstream.
> +
> +Example:
> + sata@ffe08000 {
> + compatible = "calxeda,hb-ahci";
> + reg = <0xffe08000 0x1000>;
> + interrupts = <115>;
> + calxeda,port-phys = <&combophy5 0 &combophy0 0 &combophy0 1
> + &combophy0 2 &combophy0 3>;
> +
> + };
>



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