Messages in this thread Patch in this message | | | From | Michal Simek <> | Subject | [PATCH v2 3/6] GPIO: xilinx: Use __raw_readl/__raw_writel IO functions | Date | Mon, 3 Jun 2013 14:31:18 +0200 |
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This driver can be used on Xilinx ARM Zynq platform where in_be32/out_be32 functions are not implemented. Use __raw_readl/__raw_writel functions which are implemented on Microblaze and PowerPC. For ARM readl/writel functions are used instead.
The correct way how to implement this is to detect endians directly on IP. But for the gpio case without interrupt connected(it means without interrupt logic) there are just 2 registers data and tristate where auto detection can't be done.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- Changes in v2: - New patch in this series
I have chosen to use readl/writel for ARM because of barriers and keep __raw versions for microblaze and ppc where this is not a problem. The reason why in_be32/out_be32 can't be used is that it won't work on Microblaze LE when I fix Microblaze IO function implementation which is broken right now.
--- drivers/gpio/gpio-xilinx.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index 626eaa8..791ddae 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c @@ -30,8 +30,13 @@ #define XGPIO_CHANNEL_OFFSET 0x8
/* Read/Write access to the GPIO registers */ -#define xgpio_readreg(offset) in_be32(offset) -#define xgpio_writereg(offset, val) out_be32(offset, val) +#ifdef CONFIG_ARCH_ZYNQ +# define xgpio_readreg(offset) readl(offset) +# define xgpio_writereg(offset, val) writel(val, offset) +#else +# define xgpio_readreg(offset) __raw_readl(offset) +# define xgpio_writereg(offset, val) __raw_writel(val, offset) +#endif
/** * struct xgpio_instance - Stores information about GPIO device -- 1.8.2.3 [unhandled content-type:application/pgp-signature] | |