Messages in this thread Patch in this message | | | From | Jonghwan Choi <> | Subject | [PATCH 3.8-stable] ARM: EXYNOS: Fix crash on soft reset on EXYNOS5440 | Date | Thu, 04 Apr 2013 17:27:48 +0900 |
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This patch looks like it should be in the 3.8-stable tree, should we apply it?
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From: "Thomas Abraham <thomas.ab@samsung.com>"
The soft-reset control register is located in the XMU controller space. Map this controller space before writing to the soft-reset controller register.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Girish K S <ks.giri@samsung.com> Signed-off-by: Kukjin <kgene.kim@samsung.com> Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com> --- arch/arm/mach-exynos/common.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 1a89824..3b6de7a 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -299,6 +299,7 @@ void exynos4_restart(char mode, const char *cmd) void exynos5_restart(char mode, const char *cmd) { + struct device_node *np; u32 val; void __iomem *addr; @@ -306,8 +307,9 @@ void exynos5_restart(char mode, const char *cmd) val = 0x1; addr = EXYNOS_SWRESET; } else if (of_machine_is_compatible("samsung,exynos5440")) { - val = (0x10 << 20) | (0x1 << 16); - addr = EXYNOS5440_SWRESET; + np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock"); + addr = of_iomap(np, 0) + 0xcc; + val = (0xfff << 20) | (0x1 << 16); } else { pr_err("%s: cannot support non-DT\n", __func__); return; -- 1.7.9.5
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