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SubjectRe: [PATCH] select GENERIC_ATOMIC64 for c6x/score/unicore32 archs
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On Wed, 2012-08-15 at 10:36 +0800, Fengguang Wu wrote:
> > -#define L1_CACHE_BYTES L2_CACHE_BYTES
> > +#define L1_CACHE_SHIFT L2_CACHE_SHIFT
> > +#define L1_CACHE_BYTES (1 << L2_CACHE_SHIFT)
>
> Nitpick: the last line could better be:
>
> +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
>
> Reviewed-by: Fengguang Wu <fengguang.wu@intel.com>

Yes, I noticed that after sending the patch.

Should I push this through the c6x tree?

--Mark




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