Messages in this thread | | | Date | Wed, 19 Dec 2012 15:17:59 -0800 | From | "H. Peter Anvin" <> | Subject | Re: [tip:x86/microcode] x86/microcode_intel_early.c: Early update ucode on Intel's CPU |
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On 12/19/2012 03:00 PM, Borislav Petkov wrote: > On Wed, Dec 19, 2012 at 04:55:06PM -0600, Jacob Shin wrote: >> Well, really the problem is with any memory hole above 4GB that is too >> big to be covered by variable range MTRRs as UC. > > Why, their PhysBase field is the 40 MSB bits of the physical address. > That should be more than TB. >
I presume with "too big" he really means "oddly shaped".
-hpa
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