Messages in this thread | | | Date | Fri, 27 Jan 2012 11:44:53 +0530 | From | Anshuman Khandual <> | Subject | Re: [PATCH 07/13] perf_events: implement PERF_SAMPLE_BRANCH for Intel X86 (v3) |
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On Monday 09 January 2012 10:19 PM, Stephane Eranian wrote: > This patch implements PERF_SAMPLE_BRANCH support for Intel > X86 processors. It connects PERF_SAMPLE_BRANCH to the actual LBR. > > The patch adds the hooks in the PMU irq handler to save the LBR > on counter overflow for both regular and PEBS modes. > > Signed-off-by: Stephane Eranian <eranian@google.com> > --- > arch/x86/kernel/cpu/perf_event_intel.c | 35 +++++++++++++ > arch/x86/kernel/cpu/perf_event_intel_ds.c | 10 ++-- > arch/x86/kernel/cpu/perf_event_intel_lbr.c | 73 +++++++++++++++++++++++++++- > include/linux/perf_event.h | 3 + > 4 files changed, 113 insertions(+), 8 deletions(-) > This patch FAILs to compile independently because of the function 'intel_pmu_setup_lbr_filter' which is defined arch/x86/kernel/ cpu/perf_event_intel_lbr.c but used in arch/x86/kernel/cpu /perf_event_intel.c without making the prototype update in the header arch/x86/kernel/cpu/perf_event.h. Though [PATCH 8/13] rectifies the problem, [PATCH 7/13] fails to compile independently.
arch/x86/kernel/cpu/perf_event_intel_lbr.c:291: warning: ‘intel_pmu_setup_lbr_filter’ defined but not used CC arch/x86/kernel/cpu/perf_event_intel_ds.o CC arch/x86/kernel/cpu/perf_event_intel.o arch/x86/kernel/cpu/perf_event_intel.c: In function ‘intel_pmu_hw_config’: arch/x86/kernel/cpu/perf_event_intel.c:1342: error: implicit declaration of function ‘intel_pmu_setup_lbr_filter’ make[3]: *** [arch/x86/kernel/cpu/perf_event_intel.o] Error 1 make[2]: *** [arch/x86/kernel/cpu] Error 2 make[1]: *** [arch/x86/kernel] Error 2 make: *** [arch/x86] Error 2
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