Messages in this thread | | | From | Francis Moreau <> | Subject | Re: perf tools miscellaneous questions | Date | Thu, 04 Nov 2010 09:45:45 +0100 |
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Francis Moreau <francis.moro@gmail.com> writes:
> Reid Kleckner <reid.kleckner@gmail.com> writes: > >> On Wed, Nov 3, 2010 at 5:43 PM, Frederic Weisbecker <fweisbec@gmail.com> wrote: >>>> What's exactly the 'cache-misses' event ? does it include both instructions >>>> _and_ data cache misses ? both L1 and L2 caches ? >>>> >> >>>> I was expecting so but the following command makes me wondering: >>>> >>>> $ perf stat -e cache-misses:u,l1d-loads-misses:u true >>>> Performance counter stats for 'true': >>>> >>>> 763 cache-misses >>>> 874 L1-dcache-load-misses >>>> >>>> 0.000916609 seconds time elapsed >>>> >>>> Here cache-misses < L1-dcache-load-misses. >>> >>> >>> >>> Dunno, will let others answer. >> >> I think it corresponds to last level cache misses, which makes sense >> here. The difference in the two numbers represents hits to L2 (and L3 >> if it exists). > > How could I know the number of cache level on my cpu ? > > I tried: > > $ perf stat -e cache-misses:u,l1d-loads-misses:u true > > Performance counter stats for 'true': > > 802 cache-misses > 937 L1-dcache-load-misses > > 0.000996578 seconds time elapsed > > $ perf stat -e cache-misses:u,L2-loads-misses:u true > > Performance counter stats for 'true': > > 788 cache-misses > 95 LLC-load-misses > > 0.001025423 seconds time elapsed > > So it looks like you're right: in my case I have this cache > configuration: >
oops sorry, I replied too early...
so my cache configuration is:
L1 -> L2 -> LLC
where L2 misses is given by: 'cache-misses' - 'LLC-load-misses'
Is that correct ?
If so, I found 'cache-misses' term very not intuitive IMHO, probably because I'm not an expert in cpu caches...
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