lkml.org 
[lkml]   [2010]   [Nov]   [11]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH -v2 2/2] x86/pci: Add mmconf range into e820 for when it is from MSR with amd faml0h
>>> On 11.11.10 at 01:54, Yinghai Lu <yinghai@kernel.org> wrote:
> @@ -191,10 +208,12 @@ void __cpuinit fam10h_check_enable_mmcfg
> /* only trust the one handle 256 buses, if acpi=off */
> if (!acpi_pci_disabled || busnbits >= 8) {
> u64 base;
> - base = val & (0xffffULL << 32);
> + base = val & (FAM10H_MMIO_CONF_BASE_MASK <<
> + FAM10H_MMIO_CONF_BASE_SHIFT);
> if (fam10h_pci_mmconf_base_status <= 0) {
> fam10h_pci_mmconf_base = base;
> fam10h_pci_mmconf_base_status = 1;
> + e820_add_mmconf_range(busnbits);
> return;
> } else if (fam10h_pci_mmconf_base == base)
> return;

I don't think adding the range in this case is correct: Here, we
found that the BIOS enabled the feature, and we're doing
nothing to "correct" it, so we also should expect the range
to be reserved by the BIOS.

Jan



\
 
 \ /
  Last update: 2010-11-11 09:53    [W:0.032 / U:0.804 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site