Messages in this thread | | | Date | Fri, 05 Sep 2008 18:02:14 -0700 | From | venkatesh.pallipadi@intel ... | Subject | [RFC 0/4] Using HPET in MSI mode and setting up per CPU HPET timers |
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Patchset that uses HPET timers in MSI mode (when supported) and sets up per CPU HPET timers. This removes the dependency on IRQ0 timer broadcast with LAPIC stopping in deep C-state, on platforms that support HPET MSI mode.
On my test system with dual core CPU, the number of timer related interrupts (HPET_MSI + IRQ0 + LAPIC) comes down from 180 to 95 over a period of 10s, with these patches. This is on an idle system with tickless enabled and when system is idle.
Patches against tip.
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