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SubjectRe: [patch 0/7] x86, cpa: cpa related changes to be inline with TLB Application note

* Arjan van de Ven <arjan@linux.intel.com> wrote:

> On Thu, 11 Sep 2008 13:30:48 -0700
> Suresh Siddha <suresh.b.siddha@intel.com> wrote:
>
> > Following patches fixes this behavior.
> >
> > [1] http://developer.intel.com/design/processor/applnots/317080.pdf
> >
> > Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
>
> Acked-by: Arjan van de Ven <arjan@linux.intel.com>

applied them to tip/x86/pat:

3196625: x86, cpa: global flush tlb after splitting large page and before doing cpa
79abc89: x86, cpa: remove cpa pool code
e96d59b: x86, cpa: fix taking the pgd_lock with interrupts off
888fdd9: x86, cpa: dont use large pages for kernel identity mapping with DEBUG_PAGEALLOC
e579af6: x86, cpa: make the kernel physical mapping initialization a two pass sequence
c86eefc: x86, cpa: remove USER permission from the very early identity mapping attribute
e8729a5: x86, cpa: rename PTE attribute macros for kernel direct mapping in early boot

thanks!

Ingo


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