Messages in this thread | | | Date | Wed, 12 Nov 2008 22:31:43 +0100 (CET) | From | Jesper Dangaard Brouer <> | Subject | Re: NIU driver: Sun x8 Express Quad Gigabit Ethernet Adapter |
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Hi Google,
On Wed, 12 Nov 2008, David Miller wrote:
> Guess what that does? The packet counters live in the upper > 32-bits and the MARK bits live in the lower 32-bits of the > TX_CS register. > > So it first reads the packet counters, and as a side effect that > clears the MARK bits in the TX_CS register. So when we read the lower > 32-bits the MARK bits are always seen as zero.
For the thorough reader, the TX_CS Transmit Control and Status register is described in table 26-15 page 761-762 in the PDF document titled: "UltraSPARC T2 supplement to UltraSPARC architecture 2007", downloadable from: http://opensparc-t2.sunsource.net/specs/UST2-UASuppl-current-draft-HP-EXT.pdf
Cheers, Jesper Brouer
-- ------------------------------------------------------------------- MSc. Master of Computer Science Dept. of Computer Science, University of Copenhagen Author of http://www.adsl-optimizer.dk -------------------------------------------------------------------
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