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SubjectRe: SATA resume slowness, e1000 MSI warning
Date
"Michael S. Tsirkin" <mst@mellanox.co.il> writes:

> OK I guess. I gather we assume writing read-only registers has no side effects?
> Are there rumors circulating wrt to these?

I haven't heard anything about that, and if we are writing the same value back
it should be pretty safe.

I have heard it asserted that at least one version of the pci spec
only required 32bit accesses to be supported by the hardware. One of
these days I will have to look that and see if it is true. I do know
it can be weird for hardware developers to support multiple kinds of
decode. As I recall for pci and pci-x at the hardware level the only
difference in between 32bit transactions and smaller ones is the state
of the byte-enable lines.

Eric
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