Messages in this thread Patch in this message | | | From | Jason Gaston <> | Subject | [PATCH 2.6.24-rc5] x86 intel_cacheinfo.c: cpu cache info entry for Intel Tolapai | Date | Thu, 20 Dec 2007 16:50:53 -0800 |
| |
This patch adds a cpu cache info entry for the Intel Tolapai cpu.
Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
--- linux-2.6.24-rc5/arch/x86/kernel/cpu/intel_cacheinfo.c.orig 2007-12-20 16:33:33.000000000 -0800 +++ linux-2.6.24-rc5/arch/x86/kernel/cpu/intel_cacheinfo.c 2007-12-20 16:34:22.000000000 -0800 @@ -49,6 +49,7 @@ { 0x3c, LVL_2, 256 }, /* 4-way set assoc, sectored cache, 64 byte line size */ { 0x3d, LVL_2, 384 }, /* 6-way set assoc, sectored cache, 64 byte line size */ { 0x3e, LVL_2, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */ + { 0x3f, LVL_2, 256 }, /* 2-way set assoc, 64 byte line size */ { 0x41, LVL_2, 128 }, /* 4-way set assoc, 32 byte line size */ { 0x42, LVL_2, 256 }, /* 4-way set assoc, 32 byte line size */ { 0x43, LVL_2, 512 }, /* 4-way set assoc, 32 byte line size */
| |